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METHOD OF AUTOMATED SPATIAL PATTERNING OF DEFECT CENTERS IN A SUBSTRATE

Resumen de: AU2025253711A1

Method of automated spatial patterning of defect centers (6) in a substrate, particularly a diamond crystal lattice (50), comprising the following steps: - providing a defect center (6) distribution to a machine-learning model, the machine- learning model being particularly trained to determine an output for displacement of at least one defect center (6) based on the provided defect center (6) distribution, the machine learning model providing an output for displacement of individual defect centers (6), - particularly providing a substrate, particularly diamond, comprising defect centers (6) in a bulk structure of the substrate, particularly a bulk diamond crystal lattice (50), - detecting the position of at least one defect center (6) in the bulk structure of the substrate, particularly the bulk diamond crystal lattice (50), and - displacing (61) the at least one defect center (6) in the bulk structure of the substrate, particularly the bulk diamond crystal lattice (50), particularly site-specific.

SUBSTRATE MODIFICATIONS TO SUPPRESS CORRELATED ERRORS IN MULTIQUBIT ARRAYS

Resumen de: US20260344298A1

Qubit arrays having substrates that are engineered to suppress correlated dephasing errors, correlated relaxation errors, or both are provided. Also provided are quantum circuits incorporating the qubit arrays and quantum computers incorporating the quantum circuits. The engineered substrates can be used to suppress noise and correlated errors in any qubit array that suffers from charge fluctuations or other noise that creates a non-equilibrium, error-producing state in the qubit array.

INFORMATION PROCESSING METHOD AND INFORMATION PROCESSING APPARATUS

Resumen de: US20260340464A1

A processing unit in an information processing apparatus acquires a Hamiltonian operator. The processing unit determines, for each of a plurality of time evolution operators, the number of sampling runs to be performed in a quantum computing device, based on weights of the plurality of time evolution operators, the Hamiltonian operator being approximated as a linear combination of the plurality of time evolution operators using a finite difference formula.

QUANTUM COMPUTING DEVICE FOR INVERSE NOISE CHARACTERIZATION AND ERROR MITIGATION BY RESTRICTED EVOLUTION AND METHOD THEREOF

Resumen de: US20260340474A1

An error mitigation method for a quantum computing device can include receiving a quantum circuit configuration and obtaining a set of hardware-implementable quantum gates. The method can determine an inverse noise representation based on a noise representation of a physical implementation of a target gate. A generalized quasi-probabilistic decomposition of the inverse noise representation can be generated, including a positive component and a negative component. An updated quantum circuit configuration can be generated by inserting at least one implementable quantum gate subsequent to the target gate. The inserted gate is selected to correspond to the positive component of the decomposition, while the negative component can be explicitly excluded. The updated quantum circuit configuration is transmitted to the quantum computing device for physical execution, and an error-mitigated expectation value is received based on the execution.

SWITCH MATRIX-BASED CONTROL AND READOUT ARCHITECTURE FOR SCALABLE MULTI-QUBIT QUANTUM SYSTEMS

Resumen de: US20260340468A1

The technologies described herein are generally directed towards controlling a signal splitter, a switch matrix and a multi-throw switch in a cryogenic microwave signal routing system and architecture. The signal splitter and switch matrix are controlled in a multiplexed fashion to manage analog waveform delivery to qubits under the control of classical logic. Similarly, multiplexed qubit readout is facilitated using multi-throw switch control. The multiplexed signal delivery to qubits, by controlling signal splitter state selection and switch matrix addressing, results in high-fidelity qubit control in large qubit arrays. Qubit readout can be accomplished via multi-throw switch state control, facilitating multiplexed signal readout from any selected qubit. Further, the system/architecture allows for obtaining telemetry data from individual qubits using the multi-throw switch, so that the system can adjust for variations in qubit parameters, ensuring optimal performance, while providing real-time feedback such as for calibration and error detection.

MULTI-THROW SWITCHES-BASED CONTROL ARCHITECTURE FOR SUPERCONDUCTING QUBITS

Resumen de: US20260340465A1

The technology described herein is generally directed towards using controlled multi-throw switches and signal splitters in a cryogenic microwave signal routing system and architecture. The multi-throw switches and signal splitters are controlled in a multiplexed fashion to manage analog waveform delivery to qubits under the control of classical logic. Similarly, multiplexed qubit readout is facilitated using multi-throw switch control. The multiplexed signal delivery to qubits, by controlling switch selection, signal splitter selection, and their states, results in high-fidelity qubit control in large qubit arrays. Qubit readout can be accomplished via switch selection and switch state control, facilitating multiplexed signal readout from any selected qubit. Further, the system/architecture allows for obtaining telemetry data from individual qubits using the multi-throw switches, so that the system can adjust for variations in qubit parameters, ensuring optimal performance, while providing real-time feedback for calibration and error detection.

Optimizing Distributed Computer Networks using Quantum Gradient Descent Network Landscape Navigation

Resumen de: US20260340462A1

Quantum entangled domain map analysis and quantum gradient descent network landscape analysis are designed to enhance inter-domain connectivity and decision-making efficiency across distributed computer networks. Quantum entangled domain map analysis uses quantum entanglement principles to create a comprehensive mapping of network domain features to identify connectivity gaps between domains and to adaptively provide cross-domain optimizations to the network. Quantum gradient descent network landscape analysis utilizes quantum gradient descent methods to intelligently navigate the optimization landscape of inter-domain relationships in the distributed network. By minimizing cost functions associated with network connectivity, quantum gradient descent network landscape analysis reduces computation time significantly while enhancing the accuracy of determining the most effective pathways for data flow.

QUANTUM COMPUTING ARRANGEMENT AND QUANTUM COMPUTER

Resumen de: US20260340467A1

In an embodiment a quantum computing arrangement includes a permanent magnet arrangement having a plurality of permanently magnetized segments, wherein the quantum computing arrangement is configured to realize a Paul trap configured for trapping ions along a predefined line, wherein each segment has a magnetization direction, and wherein the segments are arranged such that the magnetization directions of at least some segments differ from each other and such that a magnetic field is established, a magnitude of which changes along the predefined line.

MAGNETIC COMPONENT, IN PARTICULAR QUANTUM COMPONENT

Resumen de: US20260341568A1

A magnetic component comprises a substrate supporting at least one pair of permanent magnets extending in a first direction, each magnet having an interaction end, the interaction ends being arranged facing one another, the pair of magnets being arranged so as to exert an antisymmetric magnetic field with a high magnetic field gradient along a second direction orthogonal to the first direction, under the effect of a magnetic field produced by external magnetic means.

CYBER-PHYSICAL ARCHITECTURE FOR QUANTUM-ACCELERATED INDUSTRIAL MANUFACTURING AND AUTONOMOUS EXPERIMENTATION

Resumen de: US20260339300A1

A hybrid quantum-classical cyber-physical control architecture for real-time optimization and automated actuation of complex industrial processes, including an industrial digestive system configured to transform heterogeneous feedstocks into valuable resources. The system continuously ingests streaming analog telemetry from physical sensor networks, utilizing a quantum industrial problem compiler to dynamically convert process states and multi-objective physical constraints into structurally bounded, quantum-computable representations. A latency-aware orchestrator dispatches these artifacts to quantum computing resources while managing deterministic classical fallbacks to ensure continuous operation. To safely bridge quantum optimization insights with rigid physical hardware limits, an actuation stability gateway decodes quantum candidate solutions, applies reverse-scaling, and utilizes mathematical gradient dampening on out-of-bounds parameters prior to mechanical actuation. The architecture further enables multi-site graph partitioning and an automated high-throughput experimentation discovery loop, providing continuous, self-learning adaptation and optimized resource recovery across dynamic manufacturing environments.

PATTERN-LOCK TOPOLOGICAL BOUNDARY DEVICES METHODS AND APPARATUS FOR LOSSLESS EDGE CHANNELS AND GOLDEN-RATIO TILED SURFACE-CODE QUBITS USING RECOGNITION-PHYSICS PATTERN-CHARGE INVARIANT

Resumen de: US20260340469A1

A pattern-lock device includes a first region having a first integer pattern-charge value J1, a second region having a second integer pattern-charge value J2 different from J1, and an interface between the regions. When DeltaJ=J2−J1 is non-zero, the interface supports one or more localized boundary modes. In preferred embodiments, the device includes a spacer selected to support interface localization, and each mode contributes a conductance quantum e{circumflex over ( )}2/h. The interface may be patterned as a routing network or along edges of an aperiodic tiling so that vertices define stabilizer sites of a qubit fabric. Disclosed embodiments further include photonic interfaces, multi-mode bus structures, superconducting hybrids, stacked architectures, controller-coupled systems, fabrication methods, validation methods, and non-transitory computer-readable media storing fabrication and runtime-control packages for implementing and operating the device.

UTILIZING A GENERALIZED PAULI-LINDBLAD MODEL FOR SIMULATING PAULI CHANNELS AND PERFORMING QUANTUM ERROR MITIGATION

Resumen de: US20260340473A1

A method, system, and computer program product for quantum error mitigation. A quantum circuit is constructed and measured for Pauli fidelities. Pauli fidelities refer to a set of parameters used to characterize the performance of a quantum system or device. The measured fidelities are then fitted to the generalized Pauli-Lindblad model with negative or complex rates (i.e., having parameters with negative or complex numbers), which enables the generalized Pauli-Lindblad model to capture all the Pauli channels. A set of mitigation circuits is then generated by sampling from an inverse of the generalized Pauli-Lindblad model. The mitigation circuits are then used to perform quantum error mitigation on the quantum circuit. In this manner, quantum error mitigation is improved by reducing errors by utilizing a generalized Pauli-Lindblad model that captures all the Pauli channels as opposed to a subclass of the Pauli channels.

SPACE-TIME COMPACT DISTILLATION OF MAGIC STATES USING TRANSVERSAL LOGIC GATES

Resumen de: AU2025418704A1

Methods, systems, and apparatus for predicting errors that occurred during an implementation of an error-corrected transversal CNOT gate between a first logical qubit and a second logical qubit. In one aspect, a method includes decoding first measurement data obtained from measure qubits included in the first logical qubit to detect occurrences of a first error type in the first logical qubit; decoding second measurement data from measure qubits included in the second logical qubit to detect occurrences of a second error type in the second logical qubit; copying detected occurrences of the second error type to the first measurement data to generate updated first measurement data, comprising removing detection events in the first measurement data that correspond to the detected occurrences of the second error type; and decoding the updated first measurement data to detect occurrences of the second error type in the first logical qubit.

FAULT-TOLERANT ATOMIC QUANTUM COMPUTATION

Resumen de: AU2025373538A1

Provided herein are techniques for developing fault-tolerant quantum computation (FTQC) systems by leveraging quantum error correction (QEC) strategies in a neutral atom quantum information processing system. The techniques described herein reuse and replenish qubits in the quantum circuit during operation. To implement such mid-circuit qubit reuse, the quantum information processing system described herein uses a "spin-to-position" qubit conversion method for quantum state measurement. This spin-to-position qubit conversion allows non-destructive, loss-resolved qubit readout.

QUANTUM COMPUTING DEVICE, QUANTUM COMPUTING ARRANGEMENT, QUANTUM COMPUTER AND METHOD FOR OPERATING A QUANTUM COMPUTING DEVICE

Resumen de: US20260340466A1

In an embodiment a quantum computing device includes a substrate, a resonator electrode fixed to the substrate, wherein the quantum computing device is configured to realize a planar Paul trap for trapping at least one ion, and components, constituting electrodes of the planar Paul trap configured to produce an electrical trapping potential, are arranged on a top side of the substrate, wherein the resonator electrode has a plurality of windings and is a resonator for an electromagnetic wave having a resonance frequency, and wherein the resonator electrode is configured to generate an oscillating magnetic field at a position of the trapped ion in order to induce a transition in the ion based on an alternating electrical signal having the resonance frequency.

METHOD OF FABRICATING A SEMICONDUCTOR DEVICE

Resumen de: US20260344296A1

A method of fabricating a semiconductor device includes providing a workpiece (200). The workpiece comprises a semiconductor structure (210), the semiconductor structure comprising a substrate (212) and a semiconductor component (214) arranged on the substrate; a capping layer (220) over the semiconductor structure; and a shadow wall (230) comprising a leg and a body connected to the leg. The capping layer is a layer of arsenic or antimony. The leg of the shadow wall extends from the semiconductor structure through an aperture in the capping layer. The body of the shadow wall is on the capping layer and over the semiconductor structure. The method further comprises removing the capping layer, and, after removing the capping layer, depositing a further material onto a first region of the semiconductor structure. The shadow wall prevents deposition of the further material onto a second region of the semiconductor structure. Also provided is a workpiece useful in the method.

DECISION-TREE DECODERS FOR QUANTUM LOW-DENSITY PARITY-CHECK CODES

Resumen de: US20260340471A1

One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to decision tree decoding for quantum low-density parity check codes. For example, a system can comprise a memory that can store computer executable components and a processor that can execute the computer executable components stored in the memory. The computer executable components can comprise a graph construction component that can construct a decision tree given a syndrome measurement of a quantum processor on a decoding graph of a quantum error correction code. The computer executable components can further comprise an exploration component that can explore the decision tree by incrementally adding a fault to a fault set to construct a correction for the syndrome measurement.

ADAPTIVE CANARY QUBIT SYSTEM WITH REAL-TIME NOISE MAPPING AND TELEMETRY INTEGRATION FOR QUANTUM ERROR MANAGEMENT

Resumen de: US20260340472A1

The technologies described herein are directed towards using spare (unused with respect to active use by a quantum process) qubits as “canary” qubits that are measured, after application of a sequence of gates, to detect whether decoherence or noise adversely affected active qubits used in a quantum processing unit. An adaptive canary qubit system obtains telemetry data from sensors in a quantum system, and uses the telemetry data to update a noise map and rank noisy “hotspot” regions” of the quantum processing unit by noisiness. A canary qubit assigned to a hotspot region has its state measured after application of a gate sequence. If the spare qubit is in an error state, the adaptive canary qubit system reassigns an active logical qubit from that hotspot region to a less noisy region. The system includes a model that predicts placement of canary qubits based on historical telemetry data and prior results.

QUANTUM RANDOM NUMBER GENERATOR PROVENANCE AND SECURITY ANALYSIS

Resumen de: US20260342848A1

In one implementation, a device may determine that an operations supply chain for a quantum noise source is a compromised supply chain. The device may discontinue generation of a quantum random number utilizing the compromised supply chain. The device may initiate sourcing of trusted quantum noise from a trusted quantum noise source. The device may cause the trusted quantum noise to be utilized in the generation of a quantum random number.

CLIFFORD PERTURBATION THEORY-BASED ERROR MITIGATION

Resumen de: US20260340392A1

Systems/techniques that facilitate Clifford Perturbation Theory-based error mitigation are provided. In various embodiments, a system can comprise a memory that stores computer executable components. In various embodiments, the system can further comprise a processor that executes the computer executable components stored in the memory, wherein the computer executable components can comprise an expansion component that can construct a perturbative series expansion of a noise deconvolution map of a quantum circuit, wherein the noise deconvolution map is a product of an inverse of the quantum circuit and an ideal realization of the quantum circuit. In various aspects, the computer executable components can further comprise a measurement component that can invert noise on an expectation value of an observable measured on the quantum circuit based on the perturbative series expansion.

Artificially Intelligent Transpilation of General Quantum Circuits

Resumen de: US20260340463A1

Systems/techniques that facilitate artificially intelligent transpilation of quantum circuits for quantum computing are provided. In various embodiments, a system can comprise a memory that can store computer executable components. In various embodiments, the system can further comprise a processor that can execute the computer executable components stored in the memory. In various aspects, the computer executable components can comprise an input component that can generate a circuit representation of a quantum circuit. In various embodiments, the computer executable components can further comprise a learning component that can generate, via a reinforcement learning model, a transpiled circuit of the quantum circuit based on the circuit representation.

MULTI-TEMPERATURE OPERATION OF PHOTONIC INTEGRATED CIRCUITS

Resumen de: AU2025358066A1

A photonic integrated circuit (PIC) includes a. first area having first components configured to operate at a first cryogenic temperature. The first cryogenic temperature is determined by circulation of a first cryogenic coolant. In addition, the PIC includes a second area having second components configured to operate at a second cryogenic temperature. The second cryogenic temperature is determined by circulation of a second cryogenic coolant and the second cryogenic temperature is colder than the first cryogenic temperature. Further, the second area is separated from the first area by a trench etched through a substrate of the PIC, and. is connected to the first area, with a signal bridge comprising components that carry electrical and photonic signals. The second area is further connected, to the first area by a mechanical support structure that extends through the trench.

SUPERCONDUCTING QUANTUM CIRCUIT AND CHIP

Resumen de: US20260344301A1

The invention discloses a novel superconducting quantum circuit and chip, which relates to the technical field of superconducting quantum. The superconducting quantum circuit includes a quantum bit including a bit capacitor and a Josephson junction, the bit capacitor including two independent metal sheets, the Josephson junction being connected between either of the metal sheets and a ground plane in a spanned mode, a first coupling capacitor being formed between the two metal sheets, and a self-capacitor being formed between each of the metal sheets and the ground plane; and a signal transmission line, the signal transmission line being coupled with the quantum bit.

Computer-Implemented Systems for Improved Selection of Subsets of Datasets

Resumen de: US20260340470A1

A highly versatile ensemble of algorithms, such as Bisection Grover's search (BGS), containing one or more quantum algorithms has been developed for best model selection. Data in the application show that the ensemble of algorithms exhibits excellent performance and computational efficiency in its applications, specifically in the analysis of CITE-seq data. The ensemble of algorithms, such as BGS, takes advantage of quantum parallelism by integrating binary search and Grover's algorithm to allow fast computation. The proposed ensemble of algorithms, such as BGS, is consistent as long as sufficient quantum bits are available, has nearly quadratic speed-up compared to classical algorithms in terms of time complexity.

PROTECTED SUPERCONDUCTING QUBITS FROM HOMOLOGICAL QUANTUM ROTOR CODES

Nº publicación: AU2025274564A1 29/10/2026

Solicitante:

INSTITUT NATIONAL DE RECH EN INFORMATIQUE ET EN AUTOMATIQUE INRIA
INSTITUT NATIONAL DE RECHERCHE EN INFORMATIQUE ET EN AUTOMATIQUE - INRIA

Resumen de: AU2025274564A1

Method of designing a superconducting circuit for implementing noise-protected qubits, the method, for a predefined number of ordered quantum rotors, comprising selecting two initial matrices Hx and Hz of an identical number of columns equal to the number of quantum rotors, having all entries in a group such as {-1, 0, +1}, and with HxHzT= 0, and implementing a code to build a circuit based on the matrices.