Resumen de: US20260340465A1
The technology described herein is generally directed towards using controlled multi-throw switches and signal splitters in a cryogenic microwave signal routing system and architecture. The multi-throw switches and signal splitters are controlled in a multiplexed fashion to manage analog waveform delivery to qubits under the control of classical logic. Similarly, multiplexed qubit readout is facilitated using multi-throw switch control. The multiplexed signal delivery to qubits, by controlling switch selection, signal splitter selection, and their states, results in high-fidelity qubit control in large qubit arrays. Qubit readout can be accomplished via switch selection and switch state control, facilitating multiplexed signal readout from any selected qubit. Further, the system/architecture allows for obtaining telemetry data from individual qubits using the multi-throw switches, so that the system can adjust for variations in qubit parameters, ensuring optimal performance, while providing real-time feedback for calibration and error detection.
Resumen de: US20260340468A1
The technologies described herein are generally directed towards controlling a signal splitter, a switch matrix and a multi-throw switch in a cryogenic microwave signal routing system and architecture. The signal splitter and switch matrix are controlled in a multiplexed fashion to manage analog waveform delivery to qubits under the control of classical logic. Similarly, multiplexed qubit readout is facilitated using multi-throw switch control. The multiplexed signal delivery to qubits, by controlling signal splitter state selection and switch matrix addressing, results in high-fidelity qubit control in large qubit arrays. Qubit readout can be accomplished via multi-throw switch state control, facilitating multiplexed signal readout from any selected qubit. Further, the system/architecture allows for obtaining telemetry data from individual qubits using the multi-throw switch, so that the system can adjust for variations in qubit parameters, ensuring optimal performance, while providing real-time feedback such as for calibration and error detection.
Resumen de: WO2026226175A2
Aspects of the present disclosure relate generally to systems and methods for use in the implementation and/or operation of quantum information processing (QIP) systems, and more particularly, to architectures and method for photonically -networked trapped ion quantum information processing systems (QIPs). In such aspects, quantum interconnect procedures are optically isolated from quantum computing procedures.
Resumen de: AU2025253711A1
Method of automated spatial patterning of defect centers (6) in a substrate, particularly a diamond crystal lattice (50), comprising the following steps: - providing a defect center (6) distribution to a machine-learning model, the machine- learning model being particularly trained to determine an output for displacement of at least one defect center (6) based on the provided defect center (6) distribution, the machine learning model providing an output for displacement of individual defect centers (6), - particularly providing a substrate, particularly diamond, comprising defect centers (6) in a bulk structure of the substrate, particularly a bulk diamond crystal lattice (50), - detecting the position of at least one defect center (6) in the bulk structure of the substrate, particularly the bulk diamond crystal lattice (50), and - displacing (61) the at least one defect center (6) in the bulk structure of the substrate, particularly the bulk diamond crystal lattice (50), particularly site-specific.
Resumen de: US20260344301A1
The invention discloses a novel superconducting quantum circuit and chip, which relates to the technical field of superconducting quantum. The superconducting quantum circuit includes a quantum bit including a bit capacitor and a Josephson junction, the bit capacitor including two independent metal sheets, the Josephson junction being connected between either of the metal sheets and a ground plane in a spanned mode, a first coupling capacitor being formed between the two metal sheets, and a self-capacitor being formed between each of the metal sheets and the ground plane; and a signal transmission line, the signal transmission line being coupled with the quantum bit.
Resumen de: AU2025274564A1
Method of designing a superconducting circuit for implementing noise-protected qubits, the method, for a predefined number of ordered quantum rotors, comprising selecting two initial matrices Hx and Hz of an identical number of columns equal to the number of quantum rotors, having all entries in a group such as {-1, 0, +1}, and with HxHzT= 0, and implementing a code to build a circuit based on the matrices.
Resumen de: WO2026226171A2
A method for operating a quantum device, wherein the quantum device configured to receive at least one laser beam from two or more laser light inputs and comprising an array of trapped ions comprising a plurality of trapped ions, the method comprising: applying the at least one laser beam to the array of trapped ions; and performing control operations using the quantum device by applying electric fields to the trapped ion array, wherein the electric field is generated by applying a voltage to a plurality of input ports of the quantum device.
Resumen de: US20260344296A1
A method of fabricating a semiconductor device includes providing a workpiece (200). The workpiece comprises a semiconductor structure (210), the semiconductor structure comprising a substrate (212) and a semiconductor component (214) arranged on the substrate; a capping layer (220) over the semiconductor structure; and a shadow wall (230) comprising a leg and a body connected to the leg. The capping layer is a layer of arsenic or antimony. The leg of the shadow wall extends from the semiconductor structure through an aperture in the capping layer. The body of the shadow wall is on the capping layer and over the semiconductor structure. The method further comprises removing the capping layer, and, after removing the capping layer, depositing a further material onto a first region of the semiconductor structure. The shadow wall prevents deposition of the further material onto a second region of the semiconductor structure. Also provided is a workpiece useful in the method.
Resumen de: US20260340466A1
In an embodiment a quantum computing device includes a substrate, a resonator electrode fixed to the substrate, wherein the quantum computing device is configured to realize a planar Paul trap for trapping at least one ion, and components, constituting electrodes of the planar Paul trap configured to produce an electrical trapping potential, are arranged on a top side of the substrate, wherein the resonator electrode has a plurality of windings and is a resonator for an electromagnetic wave having a resonance frequency, and wherein the resonator electrode is configured to generate an oscillating magnetic field at a position of the trapped ion in order to induce a transition in the ion based on an alternating electrical signal having the resonance frequency.
Resumen de: US20260341568A1
A magnetic component comprises a substrate supporting at least one pair of permanent magnets extending in a first direction, each magnet having an interaction end, the interaction ends being arranged facing one another, the pair of magnets being arranged so as to exert an antisymmetric magnetic field with a high magnetic field gradient along a second direction orthogonal to the first direction, under the effect of a magnetic field produced by external magnetic means.
Resumen de: US20260340467A1
In an embodiment a quantum computing arrangement includes a permanent magnet arrangement having a plurality of permanently magnetized segments, wherein the quantum computing arrangement is configured to realize a Paul trap configured for trapping ions along a predefined line, wherein each segment has a magnetization direction, and wherein the segments are arranged such that the magnetization directions of at least some segments differ from each other and such that a magnetic field is established, a magnitude of which changes along the predefined line.
Resumen de: AU2025358066A1
A photonic integrated circuit (PIC) includes a. first area having first components configured to operate at a first cryogenic temperature. The first cryogenic temperature is determined by circulation of a first cryogenic coolant. In addition, the PIC includes a second area having second components configured to operate at a second cryogenic temperature. The second cryogenic temperature is determined by circulation of a second cryogenic coolant and the second cryogenic temperature is colder than the first cryogenic temperature. Further, the second area is separated from the first area by a trench etched through a substrate of the PIC, and. is connected to the first area, with a signal bridge comprising components that carry electrical and photonic signals. The second area is further connected, to the first area by a mechanical support structure that extends through the trench.
Resumen de: AU2025373538A1
Provided herein are techniques for developing fault-tolerant quantum computation (FTQC) systems by leveraging quantum error correction (QEC) strategies in a neutral atom quantum information processing system. The techniques described herein reuse and replenish qubits in the quantum circuit during operation. To implement such mid-circuit qubit reuse, the quantum information processing system described herein uses a "spin-to-position" qubit conversion method for quantum state measurement. This spin-to-position qubit conversion allows non-destructive, loss-resolved qubit readout.
Resumen de: AU2025418704A1
Methods, systems, and apparatus for predicting errors that occurred during an implementation of an error-corrected transversal CNOT gate between a first logical qubit and a second logical qubit. In one aspect, a method includes decoding first measurement data obtained from measure qubits included in the first logical qubit to detect occurrences of a first error type in the first logical qubit; decoding second measurement data from measure qubits included in the second logical qubit to detect occurrences of a second error type in the second logical qubit; copying detected occurrences of the second error type to the first measurement data to generate updated first measurement data, comprising removing detection events in the first measurement data that correspond to the detected occurrences of the second error type; and decoding the updated first measurement data to detect occurrences of the second error type in the first logical qubit.
Resumen de: EP4826601A1
A quantum device includes a first substrate; a second substrate; and a third substrate. The first substrate includes a first opening; a second opening; and a first quantum circuit pattern which may include a first quantum bit. The second substrate includes a second quantum circuit pattern including a second quantum bit. The third substrate includes a third quantum circuit pattern including a third quantum bit. The second substrate is arranged so as to overlap at least a part of the first opening in plan view. The third substrate is arranged so as to overlap at least a part of the second opening in plan view. The first quantum circuit pattern and the second quantum circuit pattern are coupled. The first quantum circuit pattern and the third quantum circuit pattern are coupled.
Resumen de: US20260339384A1
A method for operation of AQFP circuits includes accepting data arriving at any phase of a clock cycle, synchronizing the data to a known phase of a subsequent clock cycle, and providing the synchronized data to an AQFP circuit during the known phase of the subsequent clock cycle. The accepting and synchronizing of the data may be performed by a phase synchronizer and/or by a token-passing circuit. An asynchronous AQFP device includes at least one AQFP circuit and an activation phase synchronizer and/or token-passing circuit. The phase synchronizer may comprise a multiplexed array of QFP Buffers that samples each input phase of the clock cycle through a weak constant zero cell and outputs the logical OR of all input clock phases, propagating an input signal on any activation phase to a first phase output of the next activation cycle. The data may be passed from the phase synchronizer to a token-passing circuit, which passes the accepted and synchronized data to the AQFP during the known phase of the subsequent clock cycle. The token-passing circuit may comprise at least one driving QFP circuit that is triggered by the presence of the accepted data and activates at least one variable activation QFP circuit to store the accepted data in a buffer or propagate it to the AQFP circuit during the known phase of the subsequent clock cycle.
Resumen de: WO2026224498A1
The invention is a hybrid photonic system based on undoped-graphene-on-silicon waveguides incorporating radially doped encapsulated germanium. It generates a QDS through controlled destructive interference between two optical modes excited by a balanced bimodal pulsed laser. This process enables a spectral-structural slowdown of internal temporal evolution and stabilization of quantum coherence at temperatures up to 300 K, without cryogenics. Synchronization is achieved via an external atomic clock or a factory-calibrated laser, allowing QDM to operate as a self-induced photonic clock. In pulsed mode, QDM supports QDS disruption for readout, execution of structured quantum gates, and entanglement between QDM cells. The system can function as a quantum processor or protected memory. It supports Doppler-spin optical cooling and is CMOS-compatible, supporting atomic layer deposition, optical lithography, and doped-graphene encapsulation, enabling integration into scalable quantum platforms and synchronized photonic networks without requiring complex infrastructure.
Resumen de: WO2026225149A1
According to one aspect of the present invention, provided is an information processing system comprising at least one processor. The processor is configured to execute a program such that the following steps are executed: in an acquisition step, information relating to an analysis target and information relating to at least one basis function for describing the analysis target are acquired; in a quantum operation step, an inner product quantum operation is executed on the basis of the information relating to the analysis target and the information relating to the basis function, said operation being for calculating an amount relating to the inner product of a target quantum state describing the analysis target and a basis quantum state described using the basis function; and, in an optimization step, an optimization parameter relating to the basis function is optimized on the basis of a score defined using the amount relating to the inner product.
Resumen de: US20260342848A1
In one implementation, a device may determine that an operations supply chain for a quantum noise source is a compromised supply chain. The device may discontinue generation of a quantum random number utilizing the compromised supply chain. The device may initiate sourcing of trusted quantum noise from a trusted quantum noise source. The device may cause the trusted quantum noise to be utilized in the generation of a quantum random number.
Resumen de: WO2026223892A1
The invention relates to a computer-implemented method for decoding error syndromes (3) of a quantum error correction code (1) to obtain a recovery set to restore quantum states encoded in the quantum error correction code (1), wherein the error syndromes (3) are results from measurements of the stabilizers (4) of the quantum error correction code (1) executed on a quantum system comprising a plurality of data qubits (5), wherein the quantum error correction code (1) comprises at least two one-lines (6) corresponding to sets of data qubits (5), wherein a tensor product of single-qubit operators acting on each data qubit (5) of a one-line (6) commutes with the stabilizers (4) of the quantum error correction code (1), wherein at least two one-lines (6) have at least one common data qubit (5), the method comprising the following steps: in a rectification step, determining at least one recovery set indicating the set of data qubits (5) on which a recovery operation is to be applied when executed on the quantum system, wherein when the recovery operations are executed on the quantum system a quantum state outside of the code space is transferred to an encoded quantum state in the code space of the quantum error correction code (1); in a post-processing step, for at least one, preferably each, one-line (6) of the quantum error correction code (1) or symmetric differences of one-lines (6) of the quantum error correction code (1), i. determining if the number of data qubits (5) in th
Resumen de: US20260340463A1
Systems/techniques that facilitate artificially intelligent transpilation of quantum circuits for quantum computing are provided. In various embodiments, a system can comprise a memory that can store computer executable components. In various embodiments, the system can further comprise a processor that can execute the computer executable components stored in the memory. In various aspects, the computer executable components can comprise an input component that can generate a circuit representation of a quantum circuit. In various embodiments, the computer executable components can further comprise a learning component that can generate, via a reinforcement learning model, a transpiled circuit of the quantum circuit based on the circuit representation.
Resumen de: US20260340470A1
A highly versatile ensemble of algorithms, such as Bisection Grover's search (BGS), containing one or more quantum algorithms has been developed for best model selection. Data in the application show that the ensemble of algorithms exhibits excellent performance and computational efficiency in its applications, specifically in the analysis of CITE-seq data. The ensemble of algorithms, such as BGS, takes advantage of quantum parallelism by integrating binary search and Grover's algorithm to allow fast computation. The proposed ensemble of algorithms, such as BGS, is consistent as long as sufficient quantum bits are available, has nearly quadratic speed-up compared to classical algorithms in terms of time complexity.
Resumen de: US20260340473A1
A method, system, and computer program product for quantum error mitigation. A quantum circuit is constructed and measured for Pauli fidelities. Pauli fidelities refer to a set of parameters used to characterize the performance of a quantum system or device. The measured fidelities are then fitted to the generalized Pauli-Lindblad model with negative or complex rates (i.e., having parameters with negative or complex numbers), which enables the generalized Pauli-Lindblad model to capture all the Pauli channels. A set of mitigation circuits is then generated by sampling from an inverse of the generalized Pauli-Lindblad model. The mitigation circuits are then used to perform quantum error mitigation on the quantum circuit. In this manner, quantum error mitigation is improved by reducing errors by utilizing a generalized Pauli-Lindblad model that captures all the Pauli channels as opposed to a subclass of the Pauli channels.
Resumen de: US20260340472A1
The technologies described herein are directed towards using spare (unused with respect to active use by a quantum process) qubits as “canary” qubits that are measured, after application of a sequence of gates, to detect whether decoherence or noise adversely affected active qubits used in a quantum processing unit. An adaptive canary qubit system obtains telemetry data from sensors in a quantum system, and uses the telemetry data to update a noise map and rank noisy “hotspot” regions” of the quantum processing unit by noisiness. A canary qubit assigned to a hotspot region has its state measured after application of a gate sequence. If the spare qubit is in an error state, the adaptive canary qubit system reassigns an active logical qubit from that hotspot region to a less noisy region. The system includes a model that predicts placement of canary qubits based on historical telemetry data and prior results.
Nº publicación: US20260340471A1 29/10/2026
Solicitante:
INT BUSINESS MACHINES CORPORATION [US]
International Business Machines Corporation
Resumen de: US20260340471A1
One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to decision tree decoding for quantum low-density parity check codes. For example, a system can comprise a memory that can store computer executable components and a processor that can execute the computer executable components stored in the memory. The computer executable components can comprise a graph construction component that can construct a decision tree given a syndrome measurement of a quantum processor on a decoding graph of a quantum error correction code. The computer executable components can further comprise an exploration component that can explore the decision tree by incrementally adding a fault to a fault set to construct a correction for the syndrome measurement.